FPGA are integrated circuits that are widely used to deploy AI. What is the full form of FPGA?
- (a)Field Programmable Gate Array
- (b)Forward Programmable Graphical Advancements
- (c)Forward Programme Group Intelligence
- (d)Faster Programme Gesture Analytics
Correct — A, Field Programmable Gate Array. An FPGA is an integrated circuit built as an array of configurable logic blocks joined by programmable interconnects, and the buyer configures that logic after the chip has been manufactured — 'in the field' — using a hardware description language such as Verilog or VHDL. Because the same physical chip can be re-wired again and again in software, FPGAs are used to accelerate AI inference, to prototype new hardware and to run low-latency edge workloads, unlike an ASIC whose circuit is frozen at fabrication.
- (b)Forward Programmable Graphical Advancements — Not a real term in computing. The 'G' in FPGA stands for Gate (logic gates), not 'Graphical' — the graphics chip is the GPU, Graphics Processing Unit.
- (c)Forward Programme Group Intelligence — Invented phrase; it names no device or standard. FPGA describes hardware structure (a gate array), not 'group intelligence'.
- (d)Faster Programme Gesture Analytics — Invented phrase. 'Gesture analytics' is a software/AI application area, not the name of an integrated circuit family.
Chips that run AI fall into a few families. A CPU is general-purpose; a GPU is fixed hardware with thousands of parallel cores, ideal for training; an ASIC (Application Specific Integrated Circuit) is custom-built for one job and cannot be changed once fabricated. An FPGA sits between them: its logic blocks and the wiring between them are configurable by the user after manufacture, so one chip can be reshaped for a new model or protocol without a new fabrication run.
This is pure acronym recall, and it is answerable even without electronics: expand each option and only (a) uses real hardware vocabulary — 'gate array' is a standard term for a grid of logic gates, and 'field programmable' is the standard phrase for configuring a chip after it leaves the factory. The other three borrow words from adjacent buzzwords (graphics, intelligence, gesture analytics) that belong to software or to the GPU.
- FPGA = Field Programmable Gate Array: configurable logic blocks + programmable interconnect, set after manufacture
- Programmed using a hardware description language (Verilog / VHDL) and can be re-configured many times
- Xilinx sold the first commercial FPGA, the XC2064, in 1985; Ross Freeman is credited with the invention
- Contrast: an ASIC's logic is fixed at fabrication; a CPU/GPU is fixed hardware that you program only in software
- Reading the 'G' as 'Graphical' — that belongs to GPU (Graphics Processing Unit); in FPGA it is 'Gate'
- Treating FPGA and ASIC as interchangeable — an ASIC cannot be reprogrammed once it is fabricated
MPPSC's Paper-I computer block asks for the exact expansion of an IT acronym (FPGA here, W3C and JSP in earlier years); UPSC prefers statement-based questions on what such chips do — AI, quantum computing and the semiconductor supply chain.
In the field of Internet, W3C stands for:
- (a) World Wide Web Content
- (b) World Wide Web Commission
- (c) World Wide Web Center
- (d) World Wide Web Consortium
Answer(d) World Wide Web Consortium
Same skill in the same slot — MPPSC's Paper-I computer block regularly asks for the exact expansion of an IT acronym, with three invented look-alike expansions as distractors.
- practice — not a real PYQ
Which of the following integrated circuits can be reconfigured by the user after it has been manufactured?
- (a)ASIC
- (b)FPGA
- (c)A fixed-function GPU
- (d)None of the above
Answer(b) FPGA — its logic blocks and interconnects are programmed 'in the field', after fabrication, and can be re-programmed later.
- practice — not a real PYQ
GPU, the chip widely used to train AI models, stands for:
- (a)General Processing Unit
- (b)Graphics Processing Unit
- (c)Gate Programmable Unit
- (d)Grid Processing Unit
Answer(b) Graphics Processing Unit — massively parallel hardware built for graphics, now the workhorse of AI training.