Which one of the following registers is used to keep track of the next instruction to be executed ?

Correct — C, (c) Program counter. The program counter, also called the instruction pointer, is the register that holds the address of the next instruction to be fetched and executed. It is what makes a stored-program machine work its way through a program without being told where to look each time. In the fetch-decode-execute cycle the processor copies the contents of the program counter into the memory address register, reads the instruction at that address into the memory buffer register and from there into the instruction register, and increments the program counter so that it points at the instruction after the one just fetched. Only then is the instruction decoded and executed. Because the increment happens during the fetch, the program counter is already pointing at the next instruction while the current one is still being carried out — which is exactly what the question's phrase 'keep track of the next instruction' describes. Every change in the flow of a program is a change to this register: a jump or branch instruction works by loading a new address into the program counter, a subroutine call saves the current value (on the stack, or in a link register) and loads the address of the routine, and the return instruction restores the saved value. An interrupt does the same thing on the hardware's initiative, saving the program counter before control passes to the interrupt service routine so that the interrupted program can resume at the right place. The other three options are all memory-interface registers, and none of them records where execution has reached.

Why the others are wrong

• (a)Memory address register — The register that holds the address of the memory location currently being read from or written to. It is genuinely involved in fetching the next instruction — the program counter's contents are copied into it at the start of every fetch — but it is a courier, not a record. It holds whatever address the processor is using at that instant, which during the execute phase may be the address of a piece of data rather than of any instruction, and it retains no notion of where the program has reached.
• (b)Memory buffer register — Holds the data in transit between the processor and main memory — the word just read from the address in the memory address register, or the word about to be written there. During an instruction fetch it briefly holds the instruction itself, before that is passed to the instruction register for decoding, but what it stores is a value and not an address. Note also that this option and option (d) are two names for the same register, which is a standing hint in an item of this shape: two options that describe the same thing cannot be the single answer the question asks for.
• (d)Memory data register — The same register as option (b) under its other name — memory data register and memory buffer register are used interchangeably in textbooks for the register that buffers a word moving between the processor and memory. It holds data, not the address of the next instruction. Recognising the duplication is quicker than recalling either definition: when two of four options are synonyms, the answer is one of the remaining two.

Registers are the small, extremely fast storage locations inside the processor itself, at the very top of the memory hierarchy above cache, main memory and secondary storage. They are built from flip-flops, one per bit, which is why an n-bit register is a row of n flip-flops clocked together. A processor has both general-purpose registers, used by programs to hold operands and results, and special-purpose registers, each with a fixed job in the control unit. The special-purpose set that every syllabus expects is small: the program counter holds the address of the next instruction; the instruction register holds the instruction currently being decoded and executed; the memory address register holds the address of the memory location being accessed; the memory buffer or data register holds the word travelling to or from that location; the accumulator holds intermediate arithmetic results; the status or flag register records conditions such as zero, carry, sign and overflow that branch instructions test; and the stack pointer holds the address of the current top of the stack. The fetch-decode-execute cycle strings them together: the program counter supplies an address to the memory address register, memory returns the instruction through the memory buffer register into the instruction register, the program counter is incremented, the control unit decodes the instruction and the arithmetic and logic unit carries it out with the general registers and accumulator. Understanding that one cycle answers most register questions without any separate memorisation.

Key facts

• The program counter, or instruction pointer, holds the address of the next instruction to be fetched and executed.
• It is incremented during the fetch phase, so while an instruction is being executed the program counter already points to the one after it.
• Jumps, branches, subroutine calls, returns and interrupts all work by changing or restoring the value in the program counter.
• The instruction register holds the instruction currently being decoded and executed, as distinct from the address of the next one.
• The memory address register holds the address of the memory location being accessed; the memory buffer register, also called the memory data register, holds the word being transferred to or from it.
• Memory buffer register and memory data register are two names for the same register.
• Registers are the fastest storage in the machine and sit above cache and main memory in the memory hierarchy; each bit is held by a flip-flop.
• The fetch-decode-execute cycle runs: program counter to memory address register, memory read into memory buffer register, transfer to instruction register, increment the program counter, decode, execute.

Common traps

• Confusing the program counter with the instruction register. One holds the address of the next instruction, the other holds the current instruction itself.
• Thinking the memory address register tracks instructions. It holds whatever address is being used at that moment, including data addresses.
• Missing that memory buffer register and memory data register are the same thing, and spending the recall on telling them apart.
• Assuming the program counter points at the instruction being executed. It has already been incremented and points at the next one.
• Treating the program counter as a counter of instructions executed. It stores an address, not a tally.

• practice — not a real PYQ

  Which one of the following registers holds the instruction that is currently being decoded and executed ?

  • (a)Program counter
  • (b)Instruction register
  • (c)Memory address register
  • (d)Stack pointer

  Answer(b) Instruction register

• practice — not a real PYQ

  During the fetch phase of the instruction cycle, the address of the instruction to be fetched is transferred from the program counter to which one of the following ?

  • (a)Accumulator
  • (b)Instruction register
  • (c)Memory address register
  • (d)Status register

  Answer(c) Memory address register